|A Dynamic Analog Concurrently-Processed Adaptive Chip|
|By Malcolm Stagg|
There are many factors which will impact the number of inputs/outputs in the chip once it is manufactured, one of which is funding. It is expected that the chip will contain approximately:
To give a total of 64 neuron/synapse I/O pins. These pins can be routed, meaning inputs and outputs can be interchanged. For example, it would be possible to reconfigure the I/O to contain 48 inputs and 16 outputs.